This invention relates to the detection of information within a sampled data detection channel, such as a magnetic recording and playback channel. More particularly, the present invention relates to a first stage maximum likelihood detector implementing the Viterbi detection algorithm adapted only to channel characteristics, and a second stage post-processor adapted to check and correct detection results based upon an embedded channel code imposed on the information within the channel by a channel code encoding process.
A partial response maximum-likelihood (PRML) channel with Viterbi detection is a high performance architecture used for detection of a signal e.g. read from a magnetic recording medium. PRML permits magnetic transitions to be placed closer to one another than heretofore (increased intersymbol interference) and thereby enables higher magnetic transition recording densities than have been obtained with prior peak detection approaches. In PRML the magnetic recording channel is equalized to a partial response channel with known intersymbol interference. Then, a Viterbi detector is used to determine the most likely recorded sequence. Noise added into the partial response channel could cause detection errors at the output of the Viterbi detector.
User data to be recorded upon a magnetic storage medium is typically recorded in substantial blocks, each block comprising a predetermined number of bits such as approximately four thousand information bits. In order to protect against channel/detector errors, an outer error correction code (ECC) process, typically implementing a Reed-Solomon code, considers the sequence of these information bits to comprise a single ECC code word, or several ECC interleaved code words. The outer ECC process calculates and appends a predetermined number of ECC check bytes onto the user data block or block ECC interleave. On playback from the recording channel, the ECC check bytes are analyzed in order to detect and correct one or several error burst sequences within the user data block or interleave. It may be the case, particularly at high recording densities, that so many errors are made in the detection process that the outer ECC process is overwhelmed and becomes incapable of locating and/or correcting all of the error bursts.
Adding an inner or embedded channel code to each ECC protected user data block can improve channel detection performance by reducing the number of detector errors reaching an input of the ECC decoding and correction process. Implementing a channel code that provides performance gain at high code rate has previously resulted in a Viterbi detector requiring a very complex implementation, since prior Viterbi detectors have been matched to both the channel characteristics and to the channel code constraints.
The Viterbi algorithm is an iterative process of keeping track of the path with a smallest accumulated metric leading to each state of a detection trellis (graph). The metrics of all of the paths leading into a particular state are calculated and compared. Then, the path with the smallest metric is selected as the survivor path. In this manner all paths which can not be part of the minimum metric path through the trellis are systematically eliminated. The survivor path to each state is stored in a path memory. Given that the path memory is made sufficiently long, all of the survivor paths will diverge from a single path within the span of the path memory. The single path from which all of the current survivor paths diverge is the minimum metric path. The input sequence associated with this path appears at the output of the Viterbi detector.
There are two forms of prior art which are generally relevant to the present invention. The first form of prior art and the thing that has most commonly been employed in magnetic recording is a simple run length coding process that is not meant to detect errors (a code which ensures that magnetic flux transitions happen sufficiently frequently in order to provide reliable channel timing and gain control based on the incoming coded data pattern). This is the most common prior art. And in this first case the Viterbi is not necessarily matched to the code, because the code is not providing error detection or correction capability. The other form of prior art employs a code that can detect and correct errors, and in this second example the number of states and path lengths required of a Viterbi detector trellis are matched to both the channel and the code, see e.g. R. Karabed and P. Siegel, xe2x80x9cMatched Spectral-Null Codes for Partial-Response Channelsxe2x80x9d, IEEE Transactions on Information Theory, Vol. 37, No. 3, May 1991, pp. 818-855.
The squared Euclidean distance between two noiseless paths along the detector trellis is equal to the sum of the squares of the differences between the ideal samples on the two paths. In the case of independent and identically distributed Gaussian noise added to the channel, the most-likely errors made by the Viterbi detector correspond to mistaking two sequences that are separated by the minimum distance. As a consequence the minimum squared Euclidean distance can be used to estimate the probability of error at the output of the Viterbi detector.
Channel noise can cause errors at the output of the Viterbi detector. Errors may be more likely to occur at higher magnetic recording densities. User information may be more reliably recovered from the high density (high data rate) magnetic recording channel by incorporating an appropriately designed channel code. In the past, many channel codes have not achieved significant performance gains because of low code rate and because the code may not have been optimized for the error-events or error patterns that are most likely to occur within a particular partial response channel. In the early development of partial response signaling, maximum likelihood detection within a recording channel, channel code rates were typically 8/9. Later codes had higher rates, such as 16/17 and 24/25. At the same time, channel developers were considering detector trellis codes which had the desirable property of detecting and correcting error-events. Early trellis codes had a rate of 8/10 or 16/19, for example. While rates were slowly increasing for trellis codes, they generally had a lower code rate than more efficient codes which were not useful for detecting or correcting error-events.
One example of a Viterbi detector which matched a modulo-N trellis code on a partial response channel is described in Fredrickson U.S. Pat. No. 5,257,272, the disclosure thereof being incorporated herein by reference. In that patented approach a Viterbi detector replicated a conventional trellis structure for the channel N times. The N copies of the channel response trellis were interconnected such that a predetermined function associated each state in the trellis with a particular integer value modulo-N. The number N and the predetermined function were selected in accordance with channel detection and coding constraints, such that diverging erroneous sequences of minimum distance led to detector states which were distinct. The detector trellis was time-varying such that only certain values of the preselected function were allowed every m bits. The time-variation was said to assure that there were no minimum distance extensions of erroneous sequences beyond a predetermined length. One drawback of the Fredrickson ""272 patent approach was its relatively complex Viterbi detector structure.
The number of states in a Viterbi detector matched only to the channel is equal to M=2Lxe2x88x921, where L is the length of the partial response, i.e. the span of non-zero terms. For a (1xe2x88x92D) dicode channel the number of Viterbi states is 2. For a (1xe2x88x92D)(1+D)2 EPR4 channel, the number of states is 8. Channels that provide better performance at higher densities tend to have even more states. When a modulo-7 code is used on a channel with M states, the combined Viterbi detector has 7M states. As the number of states in the channel increases, the complexity of the combined detector increases seven-fold.
An example of a Viterbi detector followed by a post-processor is described in co-inventor Kelly Knudson Fitzpatrick""s U.S. Pat. Nos. 5,521,945 and 5,689,532, both of which are commonly assigned with the present patent. The disclosures of the ""945 and ""532 patents are incorporated herein by reference thereto. The described post-processor employed certain information from a Viterbi detector optimized to a PR4 target spectrum in order to produce an estimated input sequence which approached a maximum likelihood sequence estimate for an EPR4 channel target.
A hitherto unsolved need has remained for a reduced-complexity detection architecture and method for detecting information in a partial response channel characterized by more complex transfer polynomials and use of error detecting channel codes having high code rates, and by using a Viterbi detector tuned to the channel transfer function followed by a post-processor responsive to the channel code and having a relatively simplified implementation.
A general object of the present invention is to provide a two-stage detection architecture and method for a partial response channel which overcomes limitations and drawbacks of the prior art.
More particularly, an object of the present invention provides a detection architecture and method for increasing the performance of a partial response channel by correcting most likely error-events in a way that is not too complicated.
Another more specific object of the present invention is to provide a two-stage detection architecture including a first-stage Viterbi detector tailored to characteristics of a partial response channel and a second-stage post-processor tailored to characteristics of a channel code for checking and correcting incoming sequence estimates of the Viterbi detector.
A further object of the present invention is to provide an improved two-stage detection architecture for a magnetic recording and playback channel which may be practically implemented in a read channel large scale integrated circuit chip.
One more object of the present invention is to provide a method for obtaining high rate channel codes which are optimized for error-events which occur in a particular partial response channel and imposing those codes on information passing through the channel in a manner which enables a first-stage Viterbi detector to be tailored solely to the characteristics of the partial response channel and a second-stage post-processor which corrects detected sequence estimates provided by the Viterbi detector with decision metrics information relating to decision accuracy of the Viterbi detector and by reference to the channel code, its characteristics, constraints and known likely error-events, the inventive method being accomplished in a manner overcoming limitations and drawbacks of the prior art.
As a related object of the present invention, a preferred channel code comprises either a predetermined modulo-n code, an interleaved parity code, or a cyclic code having a rate (R) greater than (2pxe2x88x921xe2x88x92p)/2pxe2x88x921 where p is equal to the number of parity bits.
As another related object of the present invention, a two-stage detection architecture for a partial response channel detects and corrects multiple error-events occurring within a single user data word or an error event spanning adjacent user data words, in a manner overcoming limitations and drawbacks of the prior art.
In accordance with principles of the present invention, a two-stage sampling data detector is provided for a partial response channel. The channel, which may be a magnetic digital data recording and playback channel, such as including a disk drive or tape drive, has a channel code encoder for encoding user information sequences into blocks of code words in accordance with a predetermined channel code. The channel code is characterized by a list of most likely error-events comprising impermissible code words. In preferred form the channel code comprises a predetermined modulo-n code, an interleaved parity code, or a cyclic code having a rate (R) greater than (2pxe2x88x921xe2x88x92p)/2pxe2x88x921, where p is equal to the number of parity bits. The detector includes a first-stage detector, preferably although not necessarily a Viterbi detector, connected to receive samples from the partial response channel. The first-stage detector, being matched to characteristics of the channel and not matched to the channel code, puts out unchecked bit estimates. A second-stage post-processor is connected to receive the unchecked bit estimates and develops decision metrics information from the samples and from the unchecked bit estimates. The second-stage post-processor puts out post-processed bit estimate sequences to a channel code decoder after checking and correcting said sequences in accordance with the decision metrics information and channel-code information including the list of most likely error-events. In one preferred form the second stage post-processor includes a sequence checker for checking sequences of the unchecked bit estimates to detect a violation of the channel code, and a sequence corrector responsive to a detected channel code violation and to the decision metrics information for determining a nearest code word in squared Euclidean distance and for putting out the nearest code word in place of the unchecked bit estimate sequence.